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Keyword : Cable Install - Catering Entry : CADD Architecture - CAE : Cadence Layout IC Design Jobs (1 - 10)

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Packaging Engineer
Extreme Networks (CA)
...power integrity, circuit design , and high volume manufacturing requirements Perform package layout using Cadence package design tools Working with board...
techcareers.com (03/18/10)
 
Open PDK Coordinator
Silvaco (Austin, TX)
...and a thorough knowledge of the Cadence Flow from schematic capture, circuit simulation, IC layout , design rule and LVS checking to Netlist and parasitic...
techcareers.com (03/11/10)
 
Principal RF IC / Analog Mixed-Signal Design Engineer
SMGT Tek (San Jose, CA)
...perform simulations using SpectreRF, AMS Designer and RFDE/Golden Gate within the Cadence IC design suite. Perform layout and layout verification,...
Climber.com (01/21/10)
 
Sr. RF/Analog/Mixed Signal IC Design Engineer
Motek Technologies (San Jose, CA)
...perform simulations using SpectreRF, AMS Designer and RFDE/Golden Gate within the Cadence IC design suite. Perform layout and layout verification,...
Climber.com (03/07/10)
 
Principal IC Layout Designer
Skyworks (Woburn, MA)
...verification tools such as Cadence or Mentor Graphics. Responsibilities include: . IC Layout , verification and tape out of complex analog, digital and mixed...
Climber.com (02/07/10)
 
Mask Layout Designer - Analog/RF IC **Multiple Openings** (Contract)
Qualcomm (San Diego, CA)
Requisition # G1785430 Job Title Mask Layout Designer - Analog/RF IC **Multiple Openings** (Contract) Post Date 9/15/2009 Division QCT Job Area Engineering...
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Climber.com (01/23/10)
 
Analog Design Engineer, Cadence , CMOS, Analog or Mixed
Unknown (Santa Clara, CA)
...Electrical Engineering with a minimum of 5 years experience in analog or mixed-mode IC design at the transistor level. Strong knowledge of sub-micron CMOS...
Kijiji (01/26/10)
 
Mask Layout Designer - Analog/RF IC **Multiple Openings** (Contract)
Qualcomm (Santa Clara, CA)
Requisition # G1826061 Job Title Mask Layout Designer - Analog/RF IC **Multiple Openings** (Contract) Santa Clara Post Date 10/7/2009 Division QCT Job Area...
Climber.com (01/23/10)
 
Analog Design Engineer, Cadence , CMOS, Analog or Mixed
CyberCoders (Santa Clara, CA)
...in Electrical Engineering with a minimum of 5 years experience in analog or mixed-mode IC design at the transistor level. * Strong knowledge of sub-micron CMOS...
Dice.com (12/23/09)
 
IC Package Design Engineer
Qualcomm (San Diego, CA)
...system level cost Responsibilities 7+ years of IC package design and layout experience - Design layout expertise in advanced 4-6+ layer laminate and...
Qualcomm (03/13/10)
 
IC Package Design Engineer
Qualcomm (San Diego, CA)
...IC -PKG-PCB and documentation of design specifications. Skills/Experience - 5+ years of IC package design and layout experience - Excellent written and...
Qualcomm (03/13/10)
 
Sr. Analog and Mixed Signal IC Design Engineer
Maxim Integrated Products, Inc. (Sunnyvale, CA)
Job Title: Sr. Analog and Mixed Signal IC Design Engineer Profession: Computer Engineering and Information Technology -> Semiconductor Design /Verification...
JobFox.com (03/09/10)
 

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Circuit Design Engineer
Skyworks Solutions Inc (Cedar Rapids, IA)
...The candidate will be part of a product development team composed of other design engineers, technicians, and layout designers to effectively plan and execute...
RealMatch.com (01/27/10)
 
Senior IC Design Engineer
ON Semiconductor (Phoenix, AZ)
...design experience. The designer will be responsible for all typical phases of IC design including feasibility, simulation, layout , verification, etc. In...
AmericasJobExchange.com (01/13/10)
 


 

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