- Locations: California, Texas, Colorado, Arizona, Massachusetts
- Related Keywords: DFT, DFT Engineer, Design, Engineer
- Senior DFT Engineer
- Nvidia (Santa Clara, CA)
- SENIOR DFT ENGINEER Job ID 1241745 Description SENIOR DFT ENGINEER #1241745 As a DFT engineer ...MINIMUM REQUIREMENTS: - BSEE required, MSEE preferred. - 4 to 7 years of experience in DFT / design field. - Strong logic Design and verification back ground...
- Test Engineer - 2 with Security Clearance
- NORTHROP GRUMMAN (San Diego, CA)
- ...and Module Tests, Design and develop CVI/LabView/TestStand software for Functional and Module Test, Participate in design reviews and provide DFT recommendations, Development of Test Plans and Procedures. Basic Qualifications and required skills include: Proficiency with CVI and...
- Engineer , ASIC Design
- Marvell (Austin, TX)
- ...low power application processors for handheld devices like smart phone and other industry and consumer devices. As part of SoC design team, the DFT engineer will focus on developing DFT methodologies and implementation of DFT functionalities on complex SoC chips. The...
- DFT Manager
- Broadcom (Irvine, CA)
- ...across & within teams. The person must possess strong technical knowledge in the area of design -for-test ( DFT ). Job Description: Design for Test Engineer to perform any of the following ASIC design tasks: - Plan/coordinate/manage DFT resources on all design ...
- DFT Manager
- Broadcom Corporation (Irvine, CA)
- ...test engineering resources across & within teams. The person must possess strong technical knowledge in the area of design -for-test ( DFT ).Job Description: Design for Test Engineer to perform any of the following ASIC design tasks:- Plan/coordinate/manage DFT ...
- Mixed-Signal DFT Engineer - All Levels
- Qualcomm (San Diego, CA)
- ...work with mixed-signal designers and test engineers to implement and productize DFT and BIST features. The mixed-signal DFT engineer will also provide training to design and test engineering communities on mixed-signal DFT and BIST and will offer DFT design services...
- Senior SoC DFT Engineer
- STMicroelectronics (Longmont, CO)
- Senior SoC DFT Engineer Longmont, CO. STMicroelectronics Storage Products Group has a need for a Senior SoC DFT ...test time. Job Description - SoC test strategy definition and implementation - RTL design for TAP controller, boundary scan, clock and reset DFT control, IOs...
- Principal DFT Engineer
- Teknovus (San Jose, CA)
- Principal DFT Engineer Aug 19, 2009 San Jose, California Return to Search Results|Send job to a friend Description:... DFT Engineer is expected to be familiar with SOC design and able to work independently and creatively, leading improvement activities with minimal...
- Senior DFT Engineer
- Nvidia (Santa Clara, CA)
- SENIOR DFT ENGINEER Job ID 1068763 Description SENIOR DFT ENGINEER #1068763 As a DFT engineer ...MINIMUM REQUIREMENTS: - BSEE required, MSEE preferred. - 4 to 7 years of experience in DFT / design field. - Strong logic Design and verification back ground...
- Senior DFT Engineer
- Nvidia (Beaverton, OR)
- SENIOR DFT ENGINEER Job ID 1182173 Description SENIOR DFT ENGINEER #1182173 RESPONSIBILITIES: As a DFT ...MINIMUM REQUIREMENTS: - BSEE required, MSEE preferred. - 4 to 7 years of experience in DFT / design field. - Strong logic Design and verification back...
- Senior DFT Engineer
- Nvidia (Santa Clara, CA)
- SENIOR DFT ENGINEER Job ID 1241745 Description SENIOR DFT ENGINEER #1241745 As a DFT engineer ...MINIMUM REQUIREMENTS: - BSEE required, MSEE preferred. - 4 to 7 years of experience in DFT / design field. - Strong logic Design and verification back ground...
- DFT Engineer
- SandForce, Inc. (Saratoga, CA)
- SR. DFT ENGINEER Responsibilities: As a DFT Manager at SandForce, you'll be responsible for setting up cutting edge DFT...and verification. In this position you will be responsible for block level and chip level DFT and helping the design team with all aspects of DFT ...
- Staff Engineer
- Marvell (Santa Clara, CA)
- ... Engineer Job Category: Engineering Job Sub Category: Digital Design Qualifications: BSEE with 8+ years or MSEE with 6+...products including chip integration, simulation, static timing check (STA) and design -for-test ( DFT ). Other duties include design ...
- Sr. ASIC Design Engineer
- Enphase Energy (Petaluma, CA)
- ...* Knowledge of low-level communications protocols (L1/L2) strongly desired. * Knowledge of all phases of ASIC design methodology including Verilog Coding, Synthesis, DFT , ATPG, Chip Constraints, Timing Closure, Verification. * Silicon lab bring up experience * Digital/Analog Mixed...