- Locations: California, Arizona, Texas, Maryland, Minnesota
- Hardware Engineer
- Sun Microsystems (Austin, TX)
- ...be a good collaborator to work with other cad team and design team members. Must be expert in C++, STL library, timing...Should have some knowledge of issues with sub-nano CMOS technologies.Experience with Perl, Tcl, memory allocators, and Synopsys place/route tools is a plus.
- Principal Hardware Engineer
- Starent Networks Corporation (Tewksbury, MA)
- ...Excellent communication skills - verbal and written are required. Strong FPGA design experience requiredSkills * FPGA design /implementation utilizing Verilog, Synopsys , Synplify, and Xilinx, Altera and Lattice FPGA tools * PCB design /implementation and use of CAD tools...
- Sr. CAE II
- Synopsys, Inc. (Fishkill, NY)
- ...simulation is highly desirable. Background in programming / scripting languages is highly beneficial. As the world leader in electronic design automation software, Synopsys recognizes the value that a bright, creative and committed workforce has on the companys ability to grow and...
- Sr. Physical Design Engineer
- Conexant (Newport Beach, CA)
- ...IR drop for multi-voltage designs. - Knowledge of Low Power methodology. - Knowledge of deep submicron Timing concepts. Familiarity with Synopsys Design Compiler, Synopsys PrimeTime preferred. - Proficient at TCL/Pearl scripting. Job Description : Candidate will take ownership for...
- Physical Design Engineer
- Artech Information Systems, LLC (Morris County, NJ)
- ...strategy.TECHNICAL SKILLS:Familiarity with the following tools may be required: Cadence Encounter, Magma Blast Plan, Magma Blast Fusion, Magma Talus, Synopsys Design Power, , Avant! STAR-RC, and Synopsys PrimeTime. Software skills should include the ability to write/debug PERL,...
- Senior ASIC Design Engineer
- Broadcom Corporation (Irvine, CA)
- ...Good understanding of timing concepts (setup, hold, meta-stability, etc. etc.) Direct experience with the following EDA tools,Cadence: NCsim, Conformal, Synopsys : Design Compiler, Formality,Atrenta: Spyglass (Lint, CDC, Power) Additional experience with the following EDA tools and...
- Engineer, ASIC Design
- Marvell (Santa Clara, CA)
- ... in FPGA evaluation platform and verify the design in a real system. . Work on logic synthesis and static timing analysis (using Synopsys Design Compiler and Primetime) in design and verification process. Ensure that the gate area and design timing objectives are met. ....
- Senior Mixed-Signal Design Engineer
- Texas Instruments (Dallas, TX)
- ...or battery management experience is desired. Experience with Cadence design tools for analog/mixed-signal IC design is desired. Verilog and Synopsys experience is a plus. Good organization and communication skills are needed to dynamically communicate, influence, and...
- New Grad - ASIC Design Verification
- ViaSat (Cleveland, OH)
- ...1. Masters in Electrical Engineering 2. Educational focus on ASIC Design and ASIC Design Verification 3. Experience with Synopsys Design and Verification Tools 4. Demonstrated ability to design and develop in Verilog 5. Demonstrated ability to verify digital logic designs...
- ASIC-FPGA Board Level Design Engineer
- Tri-S Recruiters, Inc. (NJ)
- ...digital ASIC/FPGA/CPLD design and simulation. A specific working knowledge of VHDL (Visual elite preferred), Synthesis (Synplicity, Synopsys ) and design analysis tools (Modelsim) is preferred. Additional experience with ASIC floor planning tools and/or high-speed digital PWA ...
- Staff Digital Design Engineer
- Baytech Solutions (Austin, TX)
- ...experience in digital IC development using VHDL or Verilog. Preferred: Experience with Digital Signal Processing, microcontrollers, chip level verification, PWM, power electronics, and Verilog/ Synopsys design methodology. Please send a Word version of your resume to ###@baytechsol.com
- Member of Technical Staff, ASIC Design
- GDA Technologies Inc (San Jose, CA)
- ...Writing automating scripts. Bachelor's or equiv foreign degree in EE or Comp Eng Requires setup & execution of complete ASIC physical design flow using - Synopsys , - Cadence, & - Magma tools Fullchip assembly & tapeout to foundry; PERL, TCL, & TK scripting languages.
- FPGA Design Engineer Active Top Secret SCI Lifestyle Poly
- Design Staffing, LLC (Columbia, MD)
- ...coverage applicable to a large instantiated FPGA design ?Using tools such as Altera Quartus, Xilinx, Synplicity ( Synopsys ), and ModelSim.?Trouble shooting and diagnostic/debug experience?BSEE/BSCE minimum, MSEE/MSCE preferredDesired Skills:?High Speed Board Design ?Development of DSP...
- Member of Technical Staff, ASIC Design
- GDA Technologies Inc (San Jose, CA)
- ...Writing automating scripts. Bachelor's or equiv foreign degree in EE or Comp Eng Requires setup & execution of complete ASIC physical design flow using - Synopsys , - Cadence, & - Magma tools Fullchip assembly & tapeout to foundry; PERL, TCL, & TK scripting languages.