- Locations: California, Oregon, Colorado, New York, Texas
- Related Keywords: Design, Design Verification, Logic, VLSI, Verification
- Digital/Analog/Mixed-Signal
- Terran Systems (San Jose, CA)
- ...and two years supervising experiences. MSEE required, or Ph.D. preferred, with good track record.Manager of VLSI Design : Responsible for micro architecture, logic design , synthesis, simulation, timing verification , place and route. Requires minimum eight years hands-on ...
- Design Verification Engineer
- NXP Semiconductors (San Jose, CA)
- ...deep sub-micron technologies (45nm and beyond). You will be responsible for logic verification of our media solution, including the TriMedia processor....in Verilog, C/C++ and scripting languages - Working knowledge of CMOS VLSI and logic design - Familiarity with EDA...
- VLSI Design Engineer - DTV
- Fusion408 (Sunnyvale, CA)
- VLSI Design Engineer - DTV Job code: 2479 Job Category: Engineering City: Sunnyvale...arise -Experience with system-level testing for analog capture functionality of DTV silicon, Logic design , verification , and silicon validation/characterization. -Skillful in Verilog,...
- Sr. VLSI CAD & Methodology Engineer
- Nvidia (Beaverton, OR)
- SR. VLSI CAD & METHODOLOGY ENGINEER Job ID 1135060 Description SR. VLSI CAD...timing/power optimization, logic restructuring, repeater insertion, placement and routing, and verification . - Experience in timing closure, variation modeling, signal integrity desired. -...
- RTL Design and Verification Engineer ES/LS HW, R&D
- Tyco Healthcare (Boulder, CO)
- ...to demonstrate technical expertise via successful completion of multiple VLSI projects. . Self-motivated, excellent communication skills and ability to...KNOWLEDGE, SKILL, AND ABILITY: . Strong logic design , RTL synthesis, functional and timing verification skills...
- Design Verification Engineer
- NXP Semiconductors (San Jose, CA)
- ...deep sub-micron technologies (45nm and beyond). You will be responsible for logic verification of our media solution, including the TriMedia processor....in Verilog, C/C++ and scripting languages - Working knowledge of CMOS VLSI and logic design - Familiarity with EDA...
- Engineer, Staff ASIC Design
- Marvell (Santa Clara, CA)
- ...stages of ASIC design flows, and is experienced with state-of-the-art design tools. The candidate is strong in logic design and verification , and has solid knowledge of related VLSI architectures. Minimum requirements: * Knowledge of HDL and experience in behavioral and...
- Engineer, Senior ASIC Design
- Marvell (Santa Clara, CA)
- ...stages of ASIC design flows, and is experienced with state-of-the-art design tools. The candidate is strong in logic design and verification , and has solid knowledge of related VLSI architectures. Minimum requirements: * Knowledge of HDL and experience in behavioral and...
- Engineer, Staff ASIC Design
- Marvell Semiconductor, Inc. (Santa Clara, CA)
- ...stages of ASIC design flows, and is experienced with state-of-the-art design tools. The candidate is strong in logic design and verification , and has solid knowledge of related VLSI architectures. Minimum requirements: * Knowledge of HDL and experience in behavioral and...
- Senior ASIC Design Engineer - CMOS Image Sensors (location: Irvine, California)
- TFI (San Jose, CA)
- ...validation and test support. The ideal candidate should possess strong VLSI design experience including RTL/ logic ...required. Solid experience in simulation modeling, block and chip level verification , and RTL synthesis. Experience working with FPGA platforms, for...
- Intern - Hardware Design Engineer - Summer
- Qualcomm (San Diego, CA)
- ...As a hardware intern at QUALCOMM, you will work with programmable logic , digital signal processors, microprocessors, and ASICs on high-density circuit cards and... . Board and FPGA Design . Digital ASIC Design . Verification /Integration . RF/Analog/Mixed Signal IC Design ...
- Senior Staff Design Engineer
- Fusion408 (Santa Clara, CA)
- ... design - Place & Route support experience -Intensive logic synthesis & timing closure familiarity using Cadence/Synopsys tools -Experience of...&/or high speed analog systems a plus -Knowledge in analog/digital VLSI design will be a plus If interested, please...
- Digital/Analog/Mixed-Signal
- Unknown (San Jose, CA)
- ...and two years supervising experiences. MSEE required, or Ph.D. preferred, with good track record.Manager of VLSI Design : Responsible for micro architecture, logic design , synthesis, simulation, timing verification , place and route. Requires minimum eight years hands-on ...
- SOC Architect Engineer
- STMicroelectronics (Austin, TX)
- ...in electrical engineering, computer engineering + 10years of experience in VLSI or wireless industry ? Significant experience in architecture and ...low-power, and high-speed digital design . ? Advanced design implementation and verification skills ? logic a