- Locations: California, Virginia, Massachusetts, Texas, Washington D.C.
- Related Keywords: Implementation, SOC
- Information Security Eningeer
- GDIT (Springfield, VA)
- ...events. Candidates must be willing to work in a NOC/ SOC environment, demonstrate intuitive problem solving skills and allow...their network infrastructure, applications and operating systems. Assists with implementation of counter-measures or mitigating controls. a? cents Generates...
- Multimedia/Low Power SoC Architect
- NetLogic Microsystems (Austin, TX)
- ...Close cooperative work with development group to generate new innovative solutions to gain competitive edge in the market Hands-on/Lead in SoC implementation along side Design team. Drive major new architectural departure for future generation multimedia SoCs Qualifications:
- Multimedia/Low Power SoC Architect
- NetLogic Microsystems (Austin, TX)
- ...Close cooperative work with development group to generate new innovative solutions to gain competitive edge in the market Hands-on/Lead in SoC implementation along side Design team. Drive major new architectural departure for future generation multimedia SoCs Qualifications:
- SOC Security Specialist
- Unknown (IN)
- ...4) Vulnerability management, penetration testing and periodic security assessments. 5) Maintain & operate the core components of SOC after implementation . (ArcSight, Lancope, N-Circle) Training will be provided. 6) Draft and execute established security processes and procedures...
- Senior SoC DFT Engineer
- STMicroelectronics (Longmont, CO)
- ...DFT solutions to achieve customer DPPM goals at minimum cost in terms of silicon area and test time. Job Description - SoC test strategy definition and implementation - RTL design for TAP controller, boundary scan, clock and reset DFT control, IOs test multiplexing - Scan insertion and...
- ASIC SOC Design Engineer
- Unknown (San Jose, CA)
- ASIC SOC Design EngineerASIC SOC Design EngineerASIC SOC Design Engineer is responsible for implementation of SOC including Timing, Synthesis, Scan Insertion.Responsibilities: Responsible for defining the SOC architecture. Develop the microarchitecture and implement...
- ASIC SOC Design Engineer
- Terran Systems (San Jose, CA)
- ASIC SOC Design Engineer ASIC SOC Design Engineer is responsible for implementation of SOC including Timing, Synthesis, Scan Insertion. Responsibilities:Responsible for defining the SOC architecture. Develop the microarchitecture and implement power management logic. Work...
- Senior SoC DFT Engineer
- STMicroelectronics, Inc. (Longmont, CO)
- Senior SoC DFT Engineer Longmont , CO . STMicroelectronics Storage Products Group has a need for...cost in terms of silicon area and test time. Job Description - SoC test strategy definition and implementation - RTL design for TAP controller, boundary scan, clock and reset DFT...
- ASIC/ SOC Design Engineer - Senior Levels
- Qualcomm (San Diego, CA)
- ...consumption and area targets. Skills/Experience Candidates must have a strong ASIC design background and should have participated in implementation of SOC designs in mixed-mode design environment using latest Synopsys, Cadence and/or Magma EDA toolsets. Technical depth in the areas...
- Senior SoC Engineer
- Aerotek Contract Engineering (San Diego, CA)
- ... SoC ; 5. Plan the 3G/4G baseband SoC chipset evolution roadmap; 6. Conduct the design, modeling and implementation engineers of whole SoC design cycle. Requirements: 1. 10+ years experience of embedded and/or parallel CPU and DSP architecture design, hands-on experience in the...
- Engineer, Senior ASIC Design
- Marvell (Aliso Viejo, CA)
- ...Prefer BS or MS with five to ten years experience in ASIC development, particularly integration of multiple IP's into an SOC implementation . Looking for people skilled in deep sub-micron ASIC timing closure flow including Prime Time-SI, Cross-Talk analysis tools, Power Analysis tools,...
- Engineer, Senior ASIC Design
- Marvell Semiconductor, Inc. (Aliso Viejo, CA)
- ...Prefer BS or MS with five to ten years experience in ASIC development, particularly integration of multiple IP's into an SOC implementation . Looking for people skilled in deep sub-micron ASIC timing closure flow including Prime Time-SI, Cross-Talk analysis tools, Power Analysis tools,...
- ASIC SOC Design Engineer
- Unknown (San Jose, CA)
- ASIC SOC Design EngineerASIC SOC Design EngineerASIC SOC Design Engineer is responsible for implementation of SOC including Timing, Synthesis, Scan Insertion.Responsibilities: Responsible for defining the SOC architecture. Develop the microarchitecture and implement...
- ASIC SOC Design Engineer
- Terran Systems (San Jose, CA)
- ASIC SOC Design Engineer ASIC SOC Design Engineer is responsible for implementation of SOC including Timing, Synthesis, Scan Insertion. Responsibilities:Responsible for defining the SOC architecture. Develop the microarchitecture and implement power management logic. Work...