Verification Specman Jobs - Browse Keywords

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Related Keywords: Specman, Verification

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Verification Engineer: Sai People Solutions (Humble, TX); ...of test plans and test suites, verification environment, compliance testing. Proficiency in a high level programming/ verification knowledge such as; C/C++, Specman , Verilog, System verilog and assembly level language, formal verification . Experience with serial protocols is a...; Email this job
Jobirn.com (10/21/09)
ASIC Verification Engineer: Unknown (Dallas, TX); 6- 12 Months contract It is for an ASIC Verification engineer. The project involves working on memory controllers. The primary tool needed is Specman . Also need experience creating or modifying eVC.Candidates with memory controller experience preferred.; Email this job
Jobirn.com (10/20/09)

Sr. Principal Verification Engineer: Broadcom (Irvine, CA); ...the LSI design team to do the following: o Come up with Verification Strategies/architecture. o Develop verification test benches with HVL (ie Specman and/or SystemVerilog) o Develop Test plans from design specifications and Standards documentations o Implement test cases outlined...; Email this job
Broadcom (11/19/09)
Sr. Principal Verification Engineer: Broadcom Corporation (Irvine, CA); ...the LSI design team to do the following:o Come up with Verification Strategies/architecture.o Develop verification test benches with HVL (ie Specman and/or SystemVerilog)o Develop Test plans from design specifications and Standards documentationso Implement test cases outlined in...; Email this job
Jobirn.com (11/26/09)
Director/Principal Engineer of Design Verification and Validation - Wireless Communications: Qualcomm (San Diego, CA); ...finish?strong track record on execution. Wireless system design or architecture experience and knowledge required. Experience with directed random verification in SystemVerilog, Vera, Verisity/ Specman and/or SystemC preferred. You should have experience leading dynamic, effective teams...; Email this job
Qualcomm (11/11/09)
Technical Leader , Advanced Verification Technologies: Cadence Design (San Diego, CA); ...of Cadence Advanced Verification products. Position Requirements Position Requirements Extensive experience in creating Coverage Driven Verification environments utilizing e-language tools [ SpecMan ], Vera, SystemVerilog or SystemC/C++ is required. Track record of successfully...; Email this job
Climber.com (10/23/09)
Technical Leader , Advanced Verification Technologies: Cadence Design (San Diego, CA); ...of Cadence Advanced Verification products. Position Requirements Position Requirements Extensive experience in creating Coverage Driven Verification environments utilizing e-language tools [ SpecMan ], Vera, SystemVerilog or SystemC/C++ is required. Track record of successfully...; Email this job
HotJobs (10/20/09)
Verification Engineer: Sai People Solutions (Humble, TX); ...of test plans and test suites, verification environment, compliance testing. Proficiency in a high level programming/ verification knowledge such as; C/C++, Specman , Verilog, System verilog and assembly level language, formal verification . Experience with serial protocols is a...; Email this job
Jobirn.com (10/21/09)
Verification Engineer: Artech Information Systems, LLC (Morris County, NJ); ...new designs into hardware emulator.TECHNICAL SKILLS:Use software development tools for microcontrollers. Must have experience with verification test languages such as Vera, Specman , and their extensions. Must know VHDL or Verilog language and using synthesis tools. Must know...; Email this job
Jobirn.com (10/27/09)
Sr. Principal Verification Engineer: Broadcom (Irvine, CA); ...the LSI design team to do the following:o Come up with Verification Strategies/architecture.o Develop verification test benches with HVL (ie Specman and/or SystemVerilog)o Develop Test plans from design specifications and Standards documentationso Implement test cases outlined in...; Email this job
Climber.com (10/31/09)
ASIC Verification Engineer - Digital: Zoran Corporation (Sunnyvale, CA); ...and Experience: * Minimum 5-7 years experience * BS in EE, Computer Engineering, or equivalent field * ASIC Verification focus * +2 years experience with Specman or System Verilog Constrained Random test-bench knowledge * +1 year experience with Assertion-Based Verification (SVA,...; Email this job
Zoran Corporation (09/02/09)
HW Validation Engineer (Emulation and post-Si): Qualcomm (San Diego, CA); ...analysis and validation. FPGA based emulation. Knowledge of several wireless standards (IS-95, GSM, HDR, and WCDMA). Design verification , ideally using Vera or Specman . Familiarity with VLSI design in HDL. Familiarity with board-level layout. High initiative - we are often doing...; Email this job
Qualcomm (11/11/09)

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