- Locations: California, Texas, Massachusetts, Ohio, Colorado
- Related Keywords: ASIC Verilog, System Verilog, VHDL Verilog, Verilog Design, Verilog Entry Level, Verilog FPGA, Verilog Intern, Verilog Internship, Verilog Vera, Verilog-a
- Hardware Engineer with Security Clearance
- Blackbird Technologies, Inc. (Columbia, MD)
- ...years of experience in hardware design Demonstrated experience in DSP/FPGA design for signal demodulation Must have experience with FPGA design using Verilog /VHDL, Altera Quartus, or Xilinx ISE Must have experience with ModelSim or Synplicity Must have experience with DSP design using TI...
- Embedded Firmware Engineer with Security Clearance
- EOIR Technologies (Fredericksburg, VA)
- ...and C++: Windows XP and/or Linux C: 8 and 32 bit microcontrollers (PIC, AVR, ARM7 preferred) C: DSP (TI C6X) VHDL/ Verilog : Xilinx Virtex/Sp artan, Altera Cyclone Understanding of basic image processing algorithms Understanding of basic motion control algorithms Experience troubleshooting...
- Engineer, Senior ASIC Design
- Marvell (Santa Clara, CA)
- ...Design Verification Qualifications: Masters Degree in Electrical Engineering preferred. Strong experience in C, C++, and Perl. Experience with Verilog coding and Verilog PLI. Knowledge of SystemC, SytemVerilog and assertion-based language and methodology is a plus. Good C/C++ and ...
- FPGA Design Engineer Active Top Secret SCI Lifestyle Poly
- Design Staffing, LLC (Columbia, MD)
- ...and Principal)Must be fully cleared to Top Secret/SCI with lifestyle/fullscope PolygraphRequirements:Implementing algorithms in FPGA design using VHDL/ VERILOG .Instantiating synthesizable VHDL/ VERILOG code applicable to large FPGA design'Generating test bench code and providing code...
- ASIC Test Methodology / Simulation Engineer
- Qualcomm (San Diego, CA)
- ...simulation debug skills, and working knowledge in mixed-signal/RF testing. Skills/Experience * Experience with Modelsim, NC- Verilog , VCS or similar digital logic simulators. * Experience with VHDL, Verilog , C, System Verilog * Experience with Verilog -A, Verilog -AMS...
- Engineer, Staff IC Design (Timing Analysis/Methodology)
- Broadcom (Irvine, CA)
- ...teams in the use and improvement of the model. Serve as back up in the generation and verification of Verilog models of the radio and radio blocks. A strong background in Verilog and Verilog simulators is required. Since tool flow is highly automated the applicant must also be...
- Engineer Design
- Broadcom (Irvine, CA)
- ...and ASIC for low power, low cost and cutting-edge performance. Responsibilities include: - Able to write Verilog RTL codes and follows design and DFT guidelines. - Able to write test benches in Verilog and/or higher level languages like System Verilog or System C or Vera. - Able...
- Engineer, Staff IC Design (Timing Analysis/Methodology)
- Broadcom Corporation (Irvine, CA)
- ...in the use and improvement of the model. Serve as back up in the generation and verification of Verilog models of the radio and radio blocks. A strong background in Verilog and Verilog simulators isrequired. Since tool flow is highly automated the applicant must also be strong...
- Engineer, Staff IC Design (Timing Analysis / Methodology) 09
- Broadcom (Irvine, CA)
- ...teams in the use and improvement of the model. Serve as back up in the generation and verification of Verilog models of the radio and radio blocks. A strong background in Verilog and Verilog simulators is required. Since tool flow is highly automated the applicant must also be...
- Engineer Design
- Broadcom Corporation (Irvine, CA)
- ...modules and ASIC for low power, low cost and cutting-edge performance.Responsibilities include:- Able to write Verilog RTL codes and follows design and DFT guidelines.- Able to write test benches in Verilog and/or higher level languages like System Verilog or System C or Vera.-...
- Engineer, Staff IC Design (Timing Analysis / Methodology) 09
- Broadcom (Irvine, CA)
- ...teams in the use and improvement of the model. Serve as back up in the generation and verification of Verilog models of the radio and radio blocks. A strong background in Verilog and Verilog simulators is required. Since tool flow is highly automated the applicant must also be...
- Elect Design & Analysis- Digital Hardware Engineer 1/2- DRT
- The Boeing Company (Germantown, MD)
- ...(eg, throughput, rise time, clock frequencies, propagation delay) and hardware description languages (eg, Hardware Description Language [HDL], Verilog ). Knowledge of computer hardware and software components (eg, processors, memory, interfaces, high order languages), and characteristics...
- Design Verification Engineers
- New NYC Opportunity! (New York, NY)
- ...verification. ~Proficiency with C, C++. ~ Must have experience with verification test languages such as Vera. Knowledge of VHDL or Verilog language and using synthesis tools is desired. ~Implement the verification strategy and create automated test benches. ~Must have a degree.
- FPGA Design Engineer with Security Clearance
- General Dynamics C4 Systems (Needham, MA)
- ...complex FPGA or ASIC design team using VHDL or Verilog is required. Understanding of datacom protocols (IPv4, IPv6, Ethernet,...etc.) and concepts is required. Experience in VHDL or Verilog , advanced verification techniques and Xilinx/Altera FPGA toolflow for large...