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Keyword : Vehicle Simulation - Visual Merchandising Manager International : Verification Engineer Manager - Verilog Designer : Verilog ASIC Verification Jobs (1 - 10)

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Design Verification Engineers
New NYC Opportunity! (New York, NY)
...years of experience verifying large-scale systems/complex ASICs. ~Career focus on ASIC verification . ~Relevant skills include writing test plans/test benches,... test languages such as Vera. Knowledge of VHDL or Verilog language and using synthesis tools is desired. ~Implement the ...
TheLadders (10/27/09)
 
ASIC Verification Engineer
Brocade Communications Systems, Inc. (San Jose, CA)
... ASIC . Hands-on implementation work for every aspect of ASIC verification , working closely with the system group, architects,...a full understanding of design using Verilog , and working experience with C/C++.At least 5+ years in design/ verification .BSEE, MS (preferred).
JobFox.com (09/09/09)
 
Senior/Principal ASIC Design Engineer
talentfuse (Phoenix, AR)
Senior/Principal ASIC Design Engineer ** MUST have top-level verification and SPICE simulation experience! Location: Phoenix, Arizona Position Summary:...in Verilog /Synthesis based ASIC Design. . Verilog language & simulation verification experience. . Mixed-signal...
NetworkedRecruiter.com (09/03/09)
 
ASIC Verification Engineer
Brocade (San Jose, CA)
Job Title: ASIC Verification Engineer Requisition #: 2125 Function: Engineering Country: United States State: California City:...a full understanding of design using Verilog , and working experience with C/C++. At least 5+ years in design/ verification . BSEE, MS (preferred).
Brocade (09/02/09)
 
Senior Engineer, ASIC Verification
Marvell (Santa Clara, CA)
Job Title: Senior Engineer, ASIC Verification Job Category: Engineering Job Sub Category: Design Verification ...Electrical Engineering preferred. Strong experience in C, C++, and Perl. Experience with Verilog coding and Verilog PLI. Knowledge of SystemC, SytemVerilog and...
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Marvell (10/08/09)
 
ASIC Design and Verification Engineer
QLogic (Shakopee, MN)
...facility. Job responsibilities include: * Design blocks of logic using Verilog or VHDL hardware languages * Analyze functional specifications and...plans in order to develop unit simulation test benches for ASIC verification * Investigate performance improvements * Investigate...
QLogic (09/29/09)
 
ASIC Verification Engineer
Brocade Communications Systems, Inc. (San Jose, CA)
... ASIC . Hands-on implementation work for every aspect of ASIC verification , working closely with the system group, architects,...a full understanding of design using Verilog , and working experience with C/C++.At least 5+ years in design/ verification .BSEE, MS (preferred).
JobFox.com (09/09/09)
 
ASIC Verification Engineer
Brocade Communications Systems, Inc. (San Jose, CA)
...the ASIC . Hands-on implementation work for every aspect of ASIC verification , working closely with the system group, architects,...candidate also needs to have a full understanding of design using Verilog , and working experience with C/C++.At least 5+ years in design/...
Climber.com (11/14/09)
 
ASIC Verification Engineer
Brocade Communications Systems, Inc. (San Jose, CA)
...the ASIC . Hands-on implementation work for every aspect of ASIC verification , working closely with the system group, architects, design...candidate also needs to have a full understanding of design using Verilog , and working experience with C/C++. At least 5+ years in design/...
HotJobs (11/11/09)
 
New Grad - ASIC Design Verification
ViaSat (Cleveland, OH)
Requisition 4250BR Job Title New Grad - ASIC Design Verification (4250) Location Cleveland OH Job Responsibilities 1. Assist in...Verilog 5. Demonstrated ability to verify digital logic designs with System Verilog 6. Experience in the Design and Verification of Programmable...
Climber.com (10/31/09)
 
ASIC Verification Engineer - Digital
Zoran Corporation (Sunnyvale, CA)
ASIC Verification Engineer - Digital Sunnyvale, CA - Hardware/VLSI Engineering As a member of VLSI engineering...chip level functionality in a complex SOC environment. Successful applicant will have verification experience and a solid understanding of Verilog based RTL design....
Zoran Corporation (09/02/09)
 
ASIC Design And Verification Engineer
Unknown (San Jose, CA)
ASIC DESIGN AND VERIFICATION ENGINEERASIC Verification Requirements:Position OverviewProspective candidate...with DSP & PHY layer communication protocols of 802.3- Experience with Verilog , Vera verification environment, common RTL simulation & verification...
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Jobirn.com (11/01/09)
 

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Wpan IC Design Engineer
Broadcom (San Diego, CA)
...team member, you will contribute to the design, development and verification of Broadcoms highly successful Wireless SOCs. Responsibilities include: Lead...is a plus. Excellent knowledge in languages relevant to the ASIC development process including Verilog , VHDL and C...
TheLadders (10/12/09)
 
Sr. Staff IC Verification Engineer
Broadcom (San Diego, CA)
...test code coverage methodology. Responsible for creation and execution of verification plans as part of complex ASIC development...verification , test code coverage and HW/SW co-simulation. -Experince with Verilog , Verilog PLI, SystemVerilog or Vera, UNIX Scripts,...
TheLadders (10/12/09)
 


 

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