- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Logic Design Engineer ! Asa member of our CPU Logic Design Team, you will be responsible for the design of CPU ... is a deep understanding of ASIC design flow including RTL design , verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO,… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Logic Design Engineer with Physical Design background! As a member of our CPU Logic Design Team, you will be responsible ... As a member of our core CPU team, you'll be a liaison between Logic design and Physical design teams responsible for achieving timing, area, performance and… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior ASIC Physical Design PPA (Performance, Power, Area) Engineer to join our dynamic and growing team. If you are ... those in NVIDIA's designs + Apply knowledge and gain experience in ASIC design including RTL and logic design , physical and circuits design , and timing… more
- NVIDIA (Santa Clara, CA)
- …checking/FV required. Good understanding of hardware architecture and hands-on skills in RTL/ logic design for timing closure. + Expertise in physical ... We are now looking for a motivated Physical Design and Timing Engineer to join...in implementing them through ECOs. + Understanding of DFT logic and hands-on experience in design closure.… more
- NVIDIA (Santa Clara, CA)
- We are looking for a Senior CPU Design Engineer !...that the design is functional. + Exercise logic design skills to optimize and meet ... engineers with experience to build ground-breaking CPUs. As a senior member of our design team, you...Digital Systems design . + Highly proficient in logic design , Verilog and/or System-Verilog, with a… more
- BAE Systems (San Jose, CA)
- …position level and/or job specifics. ** Senior Principal Front End ASIC Design Engineer (Hybrid)** **102613BR** EEO Career Site Equal Opportunity Employer. ... you can apply your expertise in Front End Digital design for ASICs driving our latest sensors highlighted by...of a large company. We are looking for a senior level chip designer who has strong proficiency in… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior Circuit Design Engineer to join our dynamic and growing team. If you are looking for a challenging and exciting ... you'll be doing: + Participate in cutting edge Processor design in deep submicron technologies. + Work as part...detection circuits is a plus + Experience with RTL, logic synthesis and verification, knowledge of Place and Route,… more
- Micron Technology, Inc. (San Jose, CA)
- …intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Senior Design Engineer at Micron Technology, Inc., you will be ... responsible for Design and analyze digital circuits used in the development...as well as synthesis and timing closure for the logic blocks. Employer will accept a Master's degree (or… more
- NVIDIA (Santa Clara, CA)
- We are now hiring for a Senior Mixed-signal Design Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... USB) preferred + Have a deep understanding of Verilog or SystemVerilog, logic design and circuit modeling for mixed-signal blocks + Deep understanding of… more
- Google (Sunnyvale, CA)
- …software and networking technologies that power all of Google's services. As a Hardware Engineer , you design and build the systems that are the heart of ... field, or equivalent practical experience. + 10 years experience in ASIC physical design flows and methodologies in advanced process nodes. + Experience with ASIC… more
- NVIDIA (Santa Clara, CA)
- …+ Ability to thrive in a dynamically changing environment. + Experience in RTL design (Verilog), verification and logic synthesis. + Strong coding skills in Perl ... The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible...and CPU clocking. The team collaborates with the front design team to understand the clocking requirements for the… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …is not limited to: + Digital microarchitecture definition and documentation + RTL logic design , debug and functional verification + IP integration and ... and developing flows at all phases of the digital design and functional verification. It is further expected that...Substantial experience with Verilog is required, as are excellent logic and debug skills. Engineering expertise in mixed-signal IP… more
- NVIDIA (Santa Clara, CA)
- …+ Ability to thrive in a dynamically changing environment. + Experience in RTL design (Verilog), verification and logic synthesis. + Strong coding skills in Perl ... The Clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible...SOC clocking. The team collaborates with the front end design team to understand the clocking requirements for the… more
- NVIDIA (Santa Clara, CA)
- …of low power circuits, eg power gating, decaps, multi-vt is required. + Understanding of Design -for-test (DFT) and logic design is a plus. + Proficiency in ... you'll be doing: + Participate in cutting edge Processor design in deep submicron technologies. + Work as part...Work as part of a global circuits team to design the state of the art in silicon monitors… more
- NVIDIA (Santa Clara, CA)
- …impact on the world! What you'll be doing: + Participate in ground breaking Processor design in deep submicron technologies. + Work as part of a global circuits team ... to design innovative circuits for hardware security, adaptive clocking and...multi-vt, etc..) is a plus. + Experience with RTL, logic synthesis and verification is a plus. + Mixed… more
- Amazon (Sunnyvale, CA)
- …Design -for-Testability) is a multi-faceted job that involves architecture definition, logic design , verification, test patterns generation, chip bring-up and ... latest generation of Echo devices is looking for a Senior DFT Engineer to continue to innovate...Experience in writing verilog/system verilog RTL related to DFT logic design . - Experience in Chip level… more
- SpaceX (Sunnyvale, CA)
- …extended hours and weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual ... Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) at SpaceX...and route, timing, noise, physical verification, electromigration, voltage drop, logic equivalency and other signoff checks) + Develop/improve physical… more
- NVIDIA (Santa Clara, CA)
- …ASIC timing closure at full chip or subsystem level with a good understanding of RTL/ logic design skills as well as physical design /circuit skills for timing ... We are now looking for a motivated Senior ASIC Engineer , Timing to join...What you'll be doing: + You will drive physical design of high-frequency and low-power CPUs, GPUs, SoCs at… more
- Renesas (San Jose, CA)
- Senior Staff Test Engineer Job Description This position is for a Senior or Staff level test engineer to support testing NPI (New Product Introduction) ... engineer will + Create and update characterization and logic scan test programs to debug high-density, high-performance flash...vendors, and maintenance provider + Work with in-house hardware engineer or outside vendor to design prototype… more
- NVIDIA (Santa Clara, CA)
- …NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification. The NVIDIA Clocks Team is ... 5+ years of relevant industry work experience. + Good understanding of Logic Design and Architecture. + Expertise in industry-standard verification flows like SV… more