- NVIDIA (Austin, TX)
- NVIDIA is seeking an elite Senior DV Engineer to verify the design and implementation of the next generation of PCI Express controllers for the world's leading ... micro-architecture of PCIE controllers at IP/sub-system levels using advanced DV methodologies such as UVM. + Building reusable bus...world at NVIDIA. Are you a creative and autonomous engineer who loves a challenge? Come join our PCIE… more
- Meta (Austin, TX)
- …of our industry leading virtual and augmented reality systems.As a Design Verification Engineer (DVEs), you will be a key contributor in planning, reviewing and ... efforts at the IP and sub-system levels. You will collaborate in improving DV methodologies and establishing best practices. Your expertise is needed in all phases… more
- Qualcomm (Austin, TX)
- …Group, Engineering Group > CPU Engineering **General Summary:** As a Design Verification Engineer , you will work with Chip Architects to validate the concepts of CPU ... for your functional domain. + Execute Verification Plans, including Design Bring-up, DV environment Bring-up, Regressions enabling all features under your care, and… more
- Meta (Austin, TX)
- …silicon, hardware, software, and content. The Reality Labs team seeks a Silicon Validation Engineer .As a Silicon Validation Engineer , you will be part of the RL ... effort to ensure high-quality silicon delivery. **Required Skills:** Silicon Validation Engineer Responsibilities: 1. Responsible for SoC and E2E system validation… more
- Meta (Austin, TX)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Lead the DV effort ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking...Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team… more
- Meta (Austin, TX)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team...Hands-on experience in verifying a IP block using standard DV based techniques. 8. Experience in EDA tools and… more
- Meta (Austin, TX)
- …and IP for data center applications. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run Logic/Physical Synthesis using advanced optimization ... CDC, RDC, Synthesis, STA, Power). 11. Work closely with the Design Engineers, DV Engineers, Emulation Engineers in supporting them with the handoff tasks. Interact… more