- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior ASIC Physical Design PPA (Performance, Power, Area) Engineer to join our dynamic and growing team. If you are ... inventiveness and intelligence. What you'll be doing: + Drive physical design and timing of high-frequency and...ASIC design including RTL and logic design , physical and circuits design ,… more
- The Boeing Company (Mountain View, CA)
- …and tools from block-level micro-architecture, through HDL coding, and physical design realization (through gate-level netlists for ASIC designs) + Integrate ... & Weapons Systems has an exciting opportunity for multiple ** ASIC and/or FPGA Design and Verification Engineers** at Lead, Senior & Principal levels to join… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Floorplan Design Engineer! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the ... and floorplan improvement opportunities + Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design and … more
- SpaceX (Redmond, WA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Redmond, WA SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON...and weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer/ Senior : $160,000.00 -… more
- Amazon (Sunnyvale, CA)
- Description As a Sr. ASIC Design Engineer, you work with a team creating hardware accelerator IP to be deployed in a range of Amazon devices. You will develop ... IP in Verilog HDL - Help define and own ASIC design methodologies - Lead cross functional...registers, and error handling. - Experience working closely with physical design teams to develop highly optimized… more
- Cisco (Maynard, MA)
- …Design team working on next generation 100G-1T coherent optical communications products. The senior physical design engineer will be focused on delivering ... the augmentation of input and design collateral. You will work with the ASIC physical design team to enhance and continuously improve the physical … more
- SpaceX (Irvine, CA)
- Sr. ASIC Physical Design Methodology/CAD Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity ... ultimate goal of enabling human life on Mars. SR. ASIC PHYSICAL DESIGN METHODOLOGY/CAD ENGINEER...CA or Irvine, CA COMPENSATION AND BENEFITS: Pay range: ASIC Engineer/ Senior : $160,000.00 - $220,000.00/per year Your… more
- NVIDIA (Austin, TX)
- NVIDIA is looking for top Senior ASIC Design Engineers to join our world class System-On-Chip engineering team, developing the industry's most complicated ... languages (Perl, Make, Python) + Interface directly with unit-level, Physical Design , CAD, Package Design ,...Expertise in developing and implementing automated solutions within the ASIC flow + Strong coding skills in Perl or… more
- SpaceX (Sunnyvale, CA)
- …Enjoys being challenged and learning new skills COMPENSATION & BENEFITS: Pay range: ASIC /FPGA Design Engineer/ Senior : $170,000.00 - $230,000.00/per year Your ... Sr. FPGA/ ASIC Design Engineer (Silicon Engineering) at...age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status. Applicants… more
- NVIDIA (Santa Clara, CA)
- …+ As a Clocks team member, you will be collaborating with other architects, ASIC designers and verification engineers to design high frequency clocks. + You ... today. The Clocks group is looking for a top-notch ASIC engineer to join the team. The Team is...SOC clocking. The team collaborates with the front end design team to understand the clocking requirements for the… more
- SpaceX (Sunnyvale, CA)
- …as necessary to support critical milestones COMPENSATION & BENEFITS: Pay range: ASIC /FPGA Design Engineer/ Senior : $170,000.00 - $230,000.00/per year Your ... Sr. ASIC Design Engineer, DDR IP (Silicon...age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status. Applicants… more
- SpaceX (Redmond, WA)
- Sr. ASIC Design Verification Engineer (Silicon Engineering) at SpaceX Redmond, WA SpaceX was founded under the belief that a future where humanity is out ... this possible, with the ultimate goal of enabling human life on Mars. SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
- NVIDIA (Santa Clara, CA)
- … Design and Timing + Great understanding of timing and physical design fundamentals + Hands-on experience in ASIC timing closure at full chip or ... We are now looking for a motivated Senior ASIC Engineer, Timing to join...intelligence. What you'll be doing: + You will drive physical design of high-frequency and low-power CPUs,… more
- NVIDIA (Santa Clara, CA)
- … Design and Timing + Great understanding of timing and physical design fundamentals + Hands-on experience in ASIC timing closure at full chip or ... We are now looking for a motivated ASIC Timing Engineer to join our dynamic and...of RTL/logic design skills as well as physical design /circuit skills for timing closure. +… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Power Engineer! NVIDIA is seeking extraordinary power engineers to design hardware accelerators and processors on our ... in SystemVerilog or similar HDL + Solid understanding of physical design and VLSI + Good communication...want to hear from you. Come, join our GPU ASIC team and help build the real-time, cost-effective computing… more
- NVIDIA (Westford, MA)
- …life's work, to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding ... a technology-focused company. What you will be doing: + You will drive physical design and timing of high-frequency and low-power DPUs and SoCs at block level,… more
- NVIDIA (Santa Clara, CA)
- … tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! If you ... or Computer Engineering or equivalent experience. + 8+ years experience in Physical design /Timing. + Experience in full-chip/sub-chip Static Timing Analysis… more
- Amazon (Seattle, WA)
- …of our company DNA. As part of a project team you will work alongside Senior ASIC Engineers; supporting the design , debug, validation and optimization of ... part of Amazon custom silicon solutions. * Work with physical design teams to achieve performance and...C/C++ and System Verilog coding. * Knowledge of schematic design and debug skills. Preferred Qualifications * ASIC… more
- Micron Technology, Inc. (Minneapolis, MN)
- …validation engineer. Our success depends on close collaboration between Analog and Digital Design , Verification, Physical Design , and Validation engineers to ... develop industry-leading memory solutions. Job requirement: + Excellent problem-solving skills + Fluent in object-oriented Python and C++ programming + Familiar with using source control management (we use git) + Proficiency in Linux/Unix environment +… more
- Huntington Ingalls Industries (Roanoke, VA)
- …forward to meeting you. Job Description Do you enjoy challenging digital FPGA/ ASIC design problems? HII Mission Technologies is seeking out-of-the-box thinkers ... FPGA/ ASIC implementation tools (eg, ISE, Quartus, Synplify, Vivado, Design Compiler, Innovus, etc.) * Writing scripts for batched verification tasks:… more